DocumentCode :
2455512
Title :
A burst-mode oriented back-end for the Balsa synthesis system
Author :
Chelcea, Tiberiu ; Bardsley, Andrew ; Edwards, Doug ; Nowick, Steven M.
Author_Institution :
Dept. of Comput. Sci., Columbia Univ., New York, NY, USA
fYear :
2002
fDate :
2002
Firstpage :
330
Lastpage :
337
Abstract :
This paper introduces several new component clustering techniques for the optimization of asynchronous systems. In particular, novel "burst-mode aware" restriction.; are imposed to limit the cluster sizes and to ensure synthesizability. A new control specification language, CH, is also introduced which facilitates the manipulation and optimization of handshake control components. The new method has been fully integrated into a comprehensive asynchronous synthesis package, Balsa. Experimental results on several substantial design examples, including a 32-bit microprocessor core, indicate significant performance improvements for the optimized circuits
Keywords :
asynchronous circuits; circuit CAD; circuit optimisation; logic CAD; microprocessor chips; specification languages; 32 bit; Balsa synthesis system; CH; asynchronous systems; burst-mode oriented back-end; cluster sizes; component clustering techniques; control specification language; handshake control components; microprocessor core; optimized circuits; synthesizability; Circuit synthesis; Communication system control; Computer science; Control system synthesis; Control systems; Design optimization; Integrated circuit synthesis; Microprocessors; Packaging; Specification languages;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
ISSN :
1530-1591
Print_ISBN :
0-7695-1471-5
Type :
conf
DOI :
10.1109/DATE.2002.998294
Filename :
998294
Link To Document :
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