Verifying clock schedules in the presence of crosstalk

This paper addresses verifying the timing of circuits containing level-sensitive latches in the presence of crosstalk We show that three consecutive periodic occurrences of the aggressor´s input switching window must be compared with the victim´s input switching window. We propose a new phase shift operator to allow aligning the aggressor´s three relevant switching windows with the victim´s input signals. We solve the problem iteratively in polynomial time, and show an upper bound on the number of iterations equal to the number of capacitors in the circuit. Our experiments demonstrate that eliminating false coupling results in finding a smaller clock period at which a circuit will run