Title :
Junction isolation for high voltage integrated circuits
Author :
Arad, E. Ophir ; Parag, A. ; Aloni, E. ; Eyal, A. ; Choi, Y. ; Shapira, S.
Author_Institution :
TowerJazz Semicond., Migdal Ha´´emek, Israel
Abstract :
We address various schemes of isolation and interconnection between high-side and low-side regions of a high-voltage gate driver integrated circuit. The main challenges are discussed. Different realizations using TS100PMHS (650V BCD technology) are presented.
Keywords :
integrated circuit interconnections; power integrated circuits; 650V BCD technology; TS100PMHS; high-voltage gate driver integrated circuit; interconnection; junction isolation; Electric breakdown; Electric fields; Integrated circuits; Junctions; Logic gates; Metals; Voltage control; Power management; capacitive field plate; high-side gate driver; junction isolation; level shifter; self-shielding;
Conference_Titel :
Electrical & Electronics Engineers in Israel (IEEEI), 2012 IEEE 27th Convention of
Conference_Location :
Eilat
Print_ISBN :
978-1-4673-4682-5
DOI :
10.1109/EEEI.2012.6376981
