Energy- and Latency-Aware NoC Mapping Based on Chaos Discrete Particle Swarm Optimization

In this paper, the mapping strategy for Network-On-chip is decomposed into two phases: assigning the tasks to the suitable IP cores, and mapping the IP cores to the appropriate network tiles in NoC platform. A heuristic mapping algorithm based on chaotic discrete particle swarm optimization is proposed. The algorithm can automatically resolve the mapping problem to optimize the delay and energy consumption. The coarse and accurate estimations for delay and energy consumption are used respectively in different phases of mapping process. Simulation results show that this algorithm can obtain better solutions than the genetic algorithm based method.