DocumentCode
2456964
Title
An investigation into quaternary CMOS full-adder based on transmission function theory
Author
Wu, Xunwei ; Chen, Xiexiong ; Prosser, Franklin
Author_Institution
Dept. of Phys., Hangzhou Univ., China
fYear
1989
fDate
29-31 May 1989
Firstpage
58
Lastpage
62
Abstract
The transmission function theory and research on ternary CMOS circuits are extended to quaternary CMOS circuits, whereby the CMOS design of a quaternary full adder is proposed. The circuit has advantages such as simplicity, low dissipation, and low-output impedance. It is shown that the quaternary CMOS full-adder has a simpler circuit construction (123 MOS transistors) although it may process more information. Furthermore, it can also use the carry-look-ahead technique for realizing high-speed operations
Keywords
CMOS integrated circuits; adders; ternary logic; carry-look-ahead technique; quaternary CMOS full-adder; transmission function theory; Arithmetic; CMOS logic circuits; Clocks; Computer science; Design methodology; Impedance; Logic circuits; MOSFETs; Multivalued logic; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 1989. Proceedings., Nineteenth International Symposium on
Conference_Location
Guangzhou
Print_ISBN
0-8186-1947-3
Type
conf
DOI
10.1109/ISMVL.1989.37760
Filename
37760
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