DocumentCode
2456965
Title
Timing error detection in ultra dynamic voltage scaling systems
Author
Koskinen, Lauri ; Turnquist, Matthew ; Hiienkari, Markus ; Mäkipää, Jani
Author_Institution
Dept. of Micro & Nanosci., Aalto Univ., Aalto, Finland
fYear
2012
fDate
14-17 Nov. 2012
Firstpage
1
Lastpage
4
Abstract
Energy per operation minimum can be reached, depending on the process node, at near- or subthreshold voltages. However, throughput of a system is severely limited at ultra-low operation voltages. Therefore, it would be ideal to have the system operate across a wide voltage range but achieving minimum energy operation simultaneously with operation over the entire voltage range is challenging. Further, process, supply voltage, temperature, and aging (PVTA) induced variation becomes a design challenge. In order to conform to varying throughput requirements and to compensate for PVTA variations, an adaptive design is required. In this paper, an extension to a previously presented subthreshold Timing-Error Detection (TED) microprocessor is proposed. The extension allows the system to operate efficiently at both low and high operation frequencies from 300 mV to 1.2 V.
Keywords
ageing; error detection; microprocessor chips; PVTA induced variation; TED microprocessor; adaptive design; process-supply voltage-temperature-and aging induced variation; subthreshold timing-error detection microprocessor; ultradynamic voltage scaling systems; ultralow operation voltages; voltage 300 mV to 1.2 V; CMOS integrated circuits; Microprocessors; Switches; Throughput; Timing; Transistors; Voltage control; Timing-Error Detection; Ultra-Dynamic Voltage Scaling; Ultra-Low Power;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical & Electronics Engineers in Israel (IEEEI), 2012 IEEE 27th Convention of
Conference_Location
Eilat
Print_ISBN
978-1-4673-4682-5
Type
conf
DOI
10.1109/EEEI.2012.6377042
Filename
6377042
Link To Document