High Performance VLSI Signal Processing using Multiple Base Representations

The multidimensional logarithmic number system (MDLNS) is a novel generalization of the classical 1-D logarithmic number system (LNS) which proves to be useful in DSP applications. A major drawback of the LNS is the "difficult" operations of addition, subtraction and conversion which either require the use of very large ROM arrays or other techniques such as bipartite function evaluation in order to reduce ROM table sizes. The MDLNS, however, allows exponential reduction of the size of the ROMs used without affecting the speed of computing the "difficult" operations; moreover, the calculations over different bases and digits are completely independent, which makes this particular representation perfectly suitable for massively parallel DSP architectures. The use of more than one base allows the final result to be produced in binary form, and the non-binary base can be optimized leading to dramatic reduction of the dynamic range of individual computations. In this paper we provide the basic theory of MDLNS and also offer several examples showing the computational advantages of the proposed approach.