Coss capacitance contribution to synchronous buck converter losses

Understanding the contribution of MOSFET parasitic elements on converter efficiency is a vital topic for MOSFET designers. Used simple excel sheets for efficiency calculation is not accurate and often give a mismatch that can not be explained. On the other hand, doing simulation analysis is good for explanation but not for design as it consumes a huge time that designers haven´t. Therefore, this paper introduces an accurate mathematical model for explaining the contribution of MOSFETs parasitic elements over the converter efficiency. 4.6 MHz, 5-1.2 V, 6A module is implemented to prove the mathematical model by simulation and experiment.