Title :
High-speed non-linear asynchronous pipelines
Author :
Ozdag, Recep O. ; Singh, Montek ; Beerel, Peter A. ; Nowick, Steven M.
Author_Institution :
Dept. of Electr. Eng.-Syst. Div., California State Univ., Los Angeles, CA, USA
Abstract :
Many approaches recently proposed for high-speed asynchronous pipelines are applicable only to linear datapaths. However, real systems typically have non-linearities in their datapaths, i.e. stages may have multiple inputs (´joins´) or multiple outputs (´forks´). This paper presents several new pipeline templates that extend existing high-speed approaches for linear dynamic logic pipelines, by providing efficient control structures that can accommodate forks and joins. In addition, constructs for conditional computation are also introduced. Timing analysis and SPICE simulations show that the performance overhead of these extensions is fairly low (5% to 20%)
Keywords :
SPICE; asynchronous circuits; high-speed integrated circuits; logic simulation; pipeline processing; timing; SPICE simulations; conditional computation constructs; control structures; datapath nonlinearities; dual-rail lookahead pipeline; forks joins; high-speed nonlinear asynchronous pipelines; linear dynamic logic pipelines; multiple inputs; multiple outputs; performance overhead; pipeline templates; timing analysis; Analytical models; Clocks; Computational modeling; Computer science; Data engineering; Logic; Performance analysis; Pipeline processing; SPICE; Timing;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-1471-5
DOI :
10.1109/DATE.2002.998422