• DocumentCode
    2457354
  • Title

    Fixed-Width Multi-Level Recursive Multipliers

  • Author

    Biswas, Kevin ; Wu, Huapeng ; Ahmadi, Majid

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Windsor Univ., Windsor, ON
  • fYear
    2006
  • fDate
    Oct. 29 2006-Nov. 1 2006
  • Firstpage
    935
  • Lastpage
    938
  • Abstract
    This paper presents analysis of new truncation techniques targeting fixed-width digital multipliers based on a multi-level recursive architecture. Error analysis shows that the maximal error is bounded by 1.25 for two-level and 0.25(2k + 1) for A-level fixed-width recursive multipliers. Complexity savings are also shown to be approximately 37.5% for two-level and multipliers. 50(1 - 2k) percent for A-level recursive multipliers.
  • Keywords
    digital arithmetic; error analysis; multiplying circuits; recursive functions; error analysis; fixed-width recursive digital multiplier; multilevel recursive architecture; truncation technique; Computer architecture; Computer errors; Costs; Electronic mail; Error analysis; Error correction; Hardware; Signal processing; Signal processing algorithms; Tree data structures;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA
  • ISSN
    1058-6393
  • Print_ISBN
    1-4244-0784-2
  • Electronic_ISBN
    1058-6393
  • Type

    conf

  • DOI
    10.1109/ACSSC.2006.354888
  • Filename
    4176698