Hierarchical simulation of substrate coupling in mixed-signal ICs considering the power supply network

Author

Brandtner, Thomas ; Weigel, Robert

Author_Institution

Dev. Center, Infineon Technol., Graz, Austria

fYear

2002

fDate

2002

Firstpage

1028

Lastpage

1032

Abstract

This paper presents a novel substrate coupling simulation tool that is well suited to floorplanning of large mixed-signal IC designs. The IC layout may consist of several subcircuits, hence a hierarchical design flow, which is usually used for IC circuit design and layout, is supported. Coupling data modelling the substrate inside subcircuits are precalculated and subsequently used during floorplanning, leading to shorter simulation time. In addition, the impedance model of the power grid is considered as well making it possible to provide estimation results of substrate coupling quickly after only one simulation step. The approach is verified by experimental results in 0.13 μm CMOS and 0.25 μm BiCMOS technologies

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; circuit layout CAD; circuit simulation; electromagnetic coupling; integrated circuit layout; mixed analogue-digital integrated circuits; power supply circuits; 0.13 micron; 0.25 micron; BiCMOS technology; CMOS technology; IC layout; floorplanning; hierarchical design flow; hierarchical simulation; mixed-signal IC designs; mixed-signal ICs; power grid impedance model; power supply network; simulation time; subcircuits; substrate coupling; substrate coupling simulation tool; BiCMOS integrated circuits; CMOS technology; Circuit simulation; Circuit synthesis; Coupling circuits; Integrated circuit layout; Power grids; Power supplies; Semiconductor device modeling; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings

Conference_Location

Paris

ISSN

1530-1591

Print_ISBN

0-7695-1471-5

Type

conf

DOI

10.1109/DATE.2002.998426

Filename

998426