DocumentCode
2457526
Title
An adaptive dictionary encoding scheme for SOC data buses
Author
Lv, Tiehan ; Henkel, Jorg ; Lekatsas, Haris ; Wolf, Wayne
Author_Institution
Princeton Univ., NJ, USA
fYear
2002
fDate
2002
Firstpage
1059
Lastpage
1064
Abstract
As bus lengths on multi-hundred-million transistor SOCs (systems-on-a-chip) grow and as inter-wire capacitances of sub-0.1 μm technologies increase, the resulting high switching capacitances of buses (and interconnects in general) have a non-negligible impact on the power consumption of a whole SOC. In this paper, we address this problem by introducing our bus encoding technique ´ADES´ that minimizes the power consumption of data buses through a dictionary-based encoding technique. We show that our technique saves between 18% and 40% of bus energy compared to the non-encoded cases using a large set of (freely-accessible) real-world applications. Furthermore, we compare our technique to the best-known data bus encoding techniques to date and show that it exceeds all of them in energy savings for the same set of applications. The additional hardware effort for our bus en/decoder is thereby very small
Keywords
adaptive codes; capacitance; encoding; integrated circuit design; integrated circuit interconnections; 0.1 micron; ADES bus encoding technique; SoC data buses; adaptive dictionary encoding scheme; bus energy; bus lengths; bus switching capacitances; data bus encoding techniques; data buses; dictionary-based encoding technique; energy savings; inter-wire capacitances; interconnects; multi-hundred-million transistor system-on-a-chip; power consumption; Automatic testing; Data buses; Design automation; Dictionaries; Encoding; Europe;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location
Paris
ISSN
1530-1591
Print_ISBN
0-7695-1471-5
Type
conf
DOI
10.1109/DATE.2002.998433
Filename
998433
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