• DocumentCode
    2458369
  • Title

    Fault isolation using tests for non-isolated blocks

  • Author

    Pomeranz, Irith ; Zorian, Yervant

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    1123
  • Abstract
    Summary form only given. Design methodologies for large designs produce circuits that consist of interconnections of functional blocks. If the blocks are large, as in core-based designs, they may be isolated for testing purposes (e.g., by test wrappers) such that different blocks can be tested independently. However, even if a test wrapper exists, it is advantageous to test functional paths that go through two or more blocks by using test vectors that propagate fault effects through several blocks. This contributes to testing of defects that cannot be detected if each block is tested separately. One of the issues that arises when several blocks are tested by the same test is that of fault isolation. If a test that propagates fault effects through blocks C1 and C2 produces a faulty response on the outputs of C2, the goal of fault isolation is to identify which one of C1 and C2 is faulty. Fault isolation is perfect if every faulty response on the outputs of the circuit can be uniquely attributed to a single block. This happens when every pair of faults belonging to different blocks is distinguishable. If faults of different blocks remain undistinguished, fault isolation is not possible when responses equal to the responses produced by these faults are produced by the circuit-under-test. It may appear that tests for several non-isolated blocks will not be able to isolate faults. In this work, we study this issue and demonstrate that perfect or close-to-perfect fault isolation is possible with tests that propagate fault effects through several blocks
  • Keywords
    fault diagnosis; logic testing; circuit-under-test; core-based designs; fault isolation; functional blocks; nonisolated blocks; test vectors; Circuit faults; Circuit testing; Design methodology; Electrical fault detection; Fault detection; Fault diagnosis; Integrated circuit interconnections;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
  • Conference_Location
    Paris
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1471-5
  • Type

    conf

  • DOI
    10.1109/DATE.2002.998479
  • Filename
    998479