DocumentCode :
2458530
Title :
FlexBench: reuse of verification IP to increase productivity
Author :
Stöhr, Bernd ; Simmons, Michael ; Geishauser, Joachim
Author_Institution :
Motorola, Munich, Germany
fYear :
2002
fDate :
2002
Firstpage :
1131
Abstract :
This paper presents FlexBench, which is a complete framework for SoC verification at the Module and SoC level, both with and without embedded processors. The focus is to increase the productivity of the verification engineer by providing a framework to reuse verification IP, which includes parts of the testbench and the test stimulus
Keywords :
circuit CAD; formal verification; industrial property; integrated circuit design; integrated circuit testing; FlexBench; embedded processor; productivity; system-on-a-chip; verification IP; Argon; Chip scale packaging; Computer bugs; Design engineering; Hardware design languages; Libraries; Monitoring; Pins; Productivity; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
ISSN :
1530-1591
Print_ISBN :
0-7695-1471-5
Type :
conf
DOI :
10.1109/DATE.2002.998487
Filename :
998487
Link To Document :
بازگشت