DocumentCode :
2460421
Title :
Arsenic dimer implants for shallow extension in 0.13μm logic devices
Author :
Chang, Bo-Yan ; Chang, Joana ; Agarwal, Abhishek ; Ameen, M.S. ; Reece, R.N. ; Chen, H.I. ; Chien, D. ; Tsai, C.C. ; Tsai, Mavis ; Weng, C.L. ; Wu, D.Y. ; Yang, Chih-Kong Ken
fYear :
2002
fDate :
27-27 Sept. 2002
Firstpage :
111
Lastpage :
114
Abstract :
Arsenic dimer, As2+, implants have been used for the formation of ultra-shallow source drain extensions for NMOS transistors in a 0.13 μm, 1.5 V CMOS logic process. A comparison of all electrical parameters including drive currents, sheet resistance, junction breakdown voltages and gate to drain capacitance indicate equivalent process performance for monomer and dimer implants. Arsenic dimer and monomer implants were also compared using bare silicon control wafers in both drift and decel mode. The dimer implants were found to be energy contamination free. The use of dimer implants resulted in machine throughput improvement of 4× without any adverse impact on the implanter performance in terms of ion source lifetime, particles, or implant uniformity.
Keywords :
CMOS logic circuits; arsenic; elemental semiconductors; equivalent circuits; ion implantation; leakage currents; semiconductor device breakdown; semiconductor doping; silicon; 0.13 micron; 0.13μm logic devices; 1.5 V; As2+ dimer implants; CMOS logic process; Si:As2+; drive currents; gate to drain capacitance; junction breakdown voltages; monomer implants; shallow extension; sheet resistance; ultra-shallow source drain extensions; CMOS logic circuits; CMOS process; Capacitance; Contamination; Electric resistance; Implants; Logic devices; MOSFETs; Silicon; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Ion Implantation Technology. 2002. Proceedings of the 14th International Conference on
Conference_Location :
Taos, New Mexico, USA
Print_ISBN :
0-7803-7155-0
Type :
conf
DOI :
10.1109/IIT.2002.1257951
Filename :
1257951
Link To Document :
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