DocumentCode :
2460499
Title :
Experiments for Decimal Floating-Point Division by Recurrence
Author :
Castellanos, Ivan D. ; Stine, James E.
Author_Institution :
Electr. & Comput. Eng. Dept., Oklahoma State Univ., Stillwater, OK
fYear :
2006
fDate :
Oct. 29 2006-Nov. 1 2006
Firstpage :
1716
Lastpage :
1720
Abstract :
In today´s society, decimal arithmetic is growing considerably in importance given its relevance in financial and commercial applications. Decimal calculations on binary hardware significantly impacts performance mainly because most systems utilize software to emulate decimal calculations. On the other hand, the introduction of dedicated decimal hardware promises the ability to improve performance by two or three orders of magnitude. The purpose of this paper is to provide an analytical study and insight into the implementation feasibility of a decimal digit recurrence division unit based on binary digit recurrence division theory.
Keywords :
dividing circuits; floating point arithmetic; binary decimal digit recurrence division unit; binary decimal hardware; decimal arithmetic calculation; decimal floating-point division; Application software; Banking; Clocks; Costs; Digital arithmetic; Floating-point arithmetic; Hardware; Internet; Software performance; Software systems; Decimal Arithmetic; Decimal Division; Digit Recurrence;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
1-4244-0784-2
Electronic_ISBN :
1058-6393
Type :
conf
DOI :
10.1109/ACSSC.2006.355054
Filename :
4176864
Link To Document :
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