LEGEND: a language for generic component library description

LEGEND is a novel generator-generator language for the definition, generation, and maintenance of generic component libraries used in high-level hardware synthesis. Each LEGEND description generates a library generator GENUS, which is organized as a hierarchy of generic component generators, templates, and instances. High-level synthesis systems typically transform the abstract behavior of a design into an interconnection of generic component instances derived from a library such as GENUS. Although existing hardware description languages (such as VHDL) can effectively describe particular component libraries, they lack the capability of generating these component libraries from a high-level description. LEGEND complements a language such as VHDL by providing a component library generator-generator with behavioral models for simulation and subsequent synthesis. LEGEND generated components have realistic register transfer semantics, including clocking, asynchrony, and data bidirectionality. LEGEND´s simple and extensible syntax allows users to add and modify component types easily. LEGEND is currently implemented on SUN3s under C/UNIX