DocumentCode
2462030
Title
Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems
Author
Cheng, Ching-Hwa ; Tung, Chiou-Kou ; Shieh, Shao-Hui ; Hung, Yu-Cherng
Author_Institution
Dept. of Electron. Eng., Feng Chia Univ., Taichung, Taiwan
fYear
2009
fDate
12-14 Sept. 2009
Firstpage
534
Lastpage
537
Abstract
Four novel low-power full adder cores with all full voltage-swing nodes are proposed to implement the ten adder modules for high-performance and low-power embedded structure. The main design objectives for these adder modules are providing not only low power dissipation and high operation speed but also full-voltage swing and the driving capability. The simulation results show that our proposed adder module M10 is superior to previous designs in transistor count with only 17 transistors per bit and consumes 51.99% to 62.99% less power than three previous designs, while it is 63.88% to 105.55% faster. Experimental results confirm the proposed adder cores are valid and effective.
Keywords
adders; embedded systems; logic design; low-power electronics; M10 adder module; embedded system; full-voltage-swing node; high-performance low-power full adder core design; low-power dissipation; transistor count; Adders; Design engineering; Embedded system; Intelligent structures; Low voltage; Multimedia systems; Power dissipation; Process design; Signal processing; Threshold voltage; Adder; Embedded System; Low Power;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Information Hiding and Multimedia Signal Processing, 2009. IIH-MSP '09. Fifth International Conference on
Conference_Location
Kyoto
Print_ISBN
978-1-4244-4717-6
Electronic_ISBN
978-0-7695-3762-7
Type
conf
DOI
10.1109/IIH-MSP.2009.195
Filename
5337354
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