Implementation of an embedded software modem platform

In this paper we propose hardware architecture of the embedded software modem platform. The hardware platform consist of a single S3C2410 ARM which its operation speed is 200 MHz, three TMS320C6416T DSPs which has a 1GHz clock, a single Stratix II EP2S60F672C5 FPGA which has 900 K gates and two two-channel ADCs and DACs which can support up to 125 MHz sampling rate. The embedded Linux 2.4 is ported on the ARM and the DSP has a transmitter and receiver and two more receivers. There are two DSPs in the receiver to support diverse signal processing algorithms which is required in the next generation communication system receiver. The FIR filter is implemented for over/down-sampling and to eliminate the harmonic elements and the aliasing in the FPGA. Also the host and client USB, RS232 for serial communication and 10 Mbps LAN for TCP/IP communication are contained for external interface. We implement IEEE 802.11a PHY part to verify the effectiveness of the embedded platform architecture. Additionally, we test and verify the platform performance through real-time video, voice and text transmission.