DocumentCode
246637
Title
Design and implementation of flexible 4M×4N MIMO channel emulator
Author
Nianzu Zhang ; Guangqi Yang ; Jianfeng Zhai ; Wei Hong
Author_Institution
Sch. of Inf. Sci. & Eng., Southeast Univ., Nanjing, China
fYear
2014
fDate
6-11 July 2014
Firstpage
713
Lastpage
714
Abstract
This paper presents a scalable hardware architecture of multi-input multi-output (MIMO) channel emulator. The basic 4×4 MIMO emulator hardware module is designed and implemented based on Viretex-6 FPGA with 100MHz bandwidth. Complexity and used resource are analyzed. Furthermore, the relative error of fixed-point and float-point simulation are compared for implementation. In particular, this design methodology allows for extending to 4M×4N MIMO channel emulation.
Keywords
MIMO communication; channel capacity; channel estimation; Viretex-6 FPGA; fixed point simulation; flexible MIMO channel emulator; float point simulation; scalable hardware architecture; Emulation; Field programmable gate arrays; Hardware; MIMO; Radio frequency; Real-time systems; Transceivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Antennas and Propagation Society International Symposium (APSURSI), 2014 IEEE
Conference_Location
Memphis, TN
ISSN
1522-3965
Print_ISBN
978-1-4799-3538-3
Type
conf
DOI
10.1109/APS.2014.6904687
Filename
6904687
Link To Document