DocumentCode :
2466492
Title :
SOPC-Based Parallel Genetic Algorithm
Author :
Jelodar, M. Salmani ; Kamal, M. ; Fakhraie, S.M. ; Ahmadabadi, M. Nili
Author_Institution :
Univ. of Tehran, Tehran
fYear :
0
fDate :
0-0 0
Firstpage :
2800
Lastpage :
2806
Abstract :
The ever-growing complexity of the modern chips is forcing fundamental changes in the way systems are designed. System-on-a-programmable-chip (SOPC) concept is bringing a major revolution in the design of integrated circuits, due to the fact that it makes unprecedented levels of in-field integration possible. Genetic Algorithm (GA) is a powerful function optimizer that is used successfully to solve problems in many different disciplines. A major drawback of GA is that it needs huge computation time for sequential execution on PCs. Therefore, the hardware implementation of GA has been the focus of some recent studies. Parallel GA (PGA) is particularly important for efficient hardware implementation and promise substantial gains in performance and results. In this paper, a SOPC-based PGA framework is proposed. Our proposed framework can be used in real-time applications. We have implemented our proposed system on an Alterareg Stratix Development Kit and we compare its performance with the corresponding software simulation. The results obtained indicate a speedup of up to 50 times in the elapsed computation time.
Keywords :
genetic algorithms; mathematics computing; parallel algorithms; system-on-chip; SOPC-based parallel genetic algorithm; function optimizer; system-on-a-programmable-chip; Application software; Electronics packaging; Evolutionary computation; Field programmable gate arrays; Genetic algorithms; Hardware; Performance gain; Personal communication networks; Steady-state; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Evolutionary Computation, 2006. CEC 2006. IEEE Congress on
Conference_Location :
Vancouver, BC
Print_ISBN :
0-7803-9487-9
Type :
conf
DOI :
10.1109/CEC.2006.1688660
Filename :
1688660
Link To Document :
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