DocumentCode :
2466957
Title :
Impact of stochastic mismatch on FinFETs SRAM cell induced by process variation
Author :
Yu, Shimeng ; Zhao, Yuning ; Du, Gang ; Kang, Jinfeng ; Han, Ruqi ; Liu, Xiaoyan
Author_Institution :
Key Lab. of Microelectron. Devices & Circuits, Peking Univ., Beijing
fYear :
2008
fDate :
8-10 Dec. 2008
Firstpage :
1
Lastpage :
4
Abstract :
3-D mixed-mode device-circuit simulation is presented to investigate stochastic mismatch of FinFETs SRAM cell induced by process variation including fin-thickness and gate length variation as well as fin line edge roughness (LER). In this work, 20 nm FinFETs SRAMpsilas sensitivity of read and write static noise margin (SNM) to process variation is evaluated. The worst cases of read and write SNM under the influence of process variation are summarized. The results show that FinFETs SRAMpsilas stability is most sensitive to the access transistorpsilas fin-thickness variation. Under the worst cases, increasing the pull-down transistorpsilas fin-number may improve read SNM. The fin LER can cause aggressive fluctuations of the butterfly-curves and impose a big challenge on robust FinFETs SRAM design. Adopting 8T cell instead of 6T cell can alleviate the fin LER effect on read stability.
Keywords :
MOSFET circuits; SRAM chips; 3D mixed-mode device-circuit simulation; FinFET; SRAM cell; fin line edge roughness; size 20 nm; static noise margin; stochastic mismatch; CMOS technology; FinFETs; Fluctuations; MOS devices; MOSFETs; Random access memory; Robustness; Stability; Stochastic processes; Stochastic resonance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-2539-6
Electronic_ISBN :
978-1-4244-2540-2
Type :
conf
DOI :
10.1109/EDSSC.2008.4760701
Filename :
4760701
Link To Document :
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