Semi-insulating SiC formed by Vanadium ion implantation

Author

Zhang, Yimen ; Wang, Chao ; Zhang, Yuming ; Wang, Yuehu ; Guo, Hui ; Tang, Xiaoyan ; Lu, Hongliang

Author_Institution

Key Lab. of Educ. Minist. for Wide Band-Gap Semicond. Mater. & Devices, Xidian Univ., Xian

fYear

2008

fDate

8-10 Dec. 2008

Firstpage

1

Lastpage

6

Abstract

With Vanadium ion implantation semi-insulating 4H-SiC layer has been investigated. For n-type and p-type 4H-SiC, resistivities have been reached 7.6times10⁶middotcm and 1.6times10¹⁰middotcm respectively after 1650degC annealing. Perfect surface morphology has been observed using a simple Carbon coating film protection. The Vanadium energy levels in forbidden band of n-type 4H-SiC were confirmed as 0.8 eV and 1.1 eV by different measurements.

Keywords

annealing; deep levels; electrical resistivity; impurity states; ion implantation; semiconductor thin films; silicon compounds; surface morphology; vanadium; wide band gap semiconductors; SiC:V; annealing; deep energy levels; forbidden band; ion implantation; resistivities; resistivity 16000000000 ohmcm; resistivity 7600000 ohmcm; semi-insulating layer; surface morphology; temperature 1650 degC; Annealing; Conductivity; Doping; Energy states; Ion implantation; Protection; Rough surfaces; Silicon carbide; Surface roughness; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on

Conference_Location

Hong Kong

Print_ISBN

978-1-4244-2539-6

Electronic_ISBN

978-1-4244-2540-2

Type

conf

DOI

10.1109/EDSSC.2008.4760745

Filename

4760745