Comparison of state of the art multilevel inverters

Author

Panagis, Panagiotis ; Stergiopoulos, Fotis ; Marabeas, Pantelis ; Manias, Stefanos

Author_Institution

Dept. of Electr., Electron. & Comput. Eng., Univ. of Newcastle Upon Tyne, Newcastle upon Tyne

fYear

2008

fDate

15-19 June 2008

Firstpage

4296

Lastpage

4301

Abstract

In this paper, a comparison between existing state of the art multilevel inverter topologies is performed. The topologies examined are the neutral point clamp multilevel inverter (NPCMLI) or diode-clamped multilevel inverter (DCMLI), the flying capacitor multilevel inverter (FCMLI) and the cascaded cell multilevel inverter (CCMLI). The comparison of these inverters is based on the criteria of output voltage quality (Peak value of the fundamental and dominant harmonic components and THD), power circuitry complexity, and implementation cost. The comparison results are based on theoretical results verified by detailed simulation results.

Keywords

invertors; cascaded cell multilevel inverter; diode-clamped multilevel inverter; flying capacitor multilevel inverter; neutral point clamp multilevel inverter; output voltage quality; power circuitry complexity; Capacitors; Circuit simulation; Circuit topology; Clamps; Costs; Power engineering and energy; Power system harmonics; Pulse width modulation inverters; Semiconductor diodes; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Specialists Conference, 2008. PESC 2008. IEEE

Conference_Location

Rhodes

ISSN

0275-9306

Print_ISBN

978-1-4244-1667-7

Electronic_ISBN

0275-9306

Type

conf

DOI

10.1109/PESC.2008.4592633

Filename

4592633