Title :
DFT for controlled-impedance I/O buffers
Author :
Al-Yamani, Ahmad A.
Author_Institution :
King Fahd Univ. of Pet. & Minerals, Dhahran
Abstract :
This paper presents an architecture that enhances the testability of controlled-impedance buffers (CIBs). By testing CIBs digitally, the new architecture overcomes most of the problems with the traditional testing method. Most of these problems are test cost related. While reducing the test cost, the new architecture allows for higher test quality that even includes delay testing capabilities
Keywords :
buffer circuits; built-in self test; design for testability; transmission lines; I/O buffers; I/O test; built-in self test; controlled-impedance buffers; design for testability; transmission lines; Automatic testing; Circuit testing; Costs; Distributed parameter circuits; Impedance; Integrated circuit reliability; Integrated circuit testing; Transmission line measurements; Transmission lines; Voltage; Built-in self test; Design; I/O characterization; I/O test; Measurement; Reliability; design-for-testability;
Conference_Titel :
Design Automation Conference, 2006 43rd ACM/IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
1-59593-381-6
DOI :
10.1109/DAC.2006.229217
