Title :
HALSIM-a very fast SPARC-V9 behavioral model
Author :
Barach, David ; Kohli, Jaspal ; Slice, John ; Spaulding, Marc ; Bharadhwaj, Rajeev ; Hudson, Don ; Neighbors, Cliff ; Saxena, Nirmal ; Crunk, Rolland
Author_Institution :
HAL Comput. Syst., Campbell, CA, USA
Abstract :
This paper describes several implementation techniques used in HAL´s 500 KIPS SPARC V9 behavioral model. Beyond presenting the details of our processor model, we describe several areas of innovation: architectural state-vector capture for injection into a gate-level hardware model, using an EDC polynomial-based signature scheme to verify a hardware design; obtaining accurate kernel and user-mode instruction trace data
Keywords :
computer architecture; formal verification; mainframes; performance evaluation; virtual machines; 500 kIPS; 64 bit; EDC polynomial-based signature scheme; HALSIM; architectural state-vector capture; gate-level hardware model; implementation techniques; kernel instruction trace data; processor model; user-mode instruction trace data; very fast SPARC-V9 behavioral model; Computer architecture; Emulation; Hardware; High level languages; Kernel; Polynomials; Registers; Technological innovation; Testing; Time to market;
Conference_Titel :
Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 1995. MASCOTS '95., Proceedings of the Third International Workshop on
Conference_Location :
Durham, NC
Print_ISBN :
0-8186-6902-0
DOI :
10.1109/MASCOT.1995.378649
