6F-1 Trench-Isolated CMUT Arrays with a Supporting Frame: Characterization and Imaging Results

We report on the characterization and imaging results of trench-isolated CMUT arrays with a supporting frame. The CMUT arrays are built on a silicon-on-insulator (SOI) wafer using direct wafer-to-wafer fusion bonding technique. Electrical contacts to individual elements are brought to the back side of the wafer by highly conductive silicon pillars. Mechanical support for array elements is provided by a silicon frame structure. 1D and 2D arrays with 250-mum element pitch were fabricated and tested in air and in immersion. Rectangular membranes are used, which feature two distinctive pull-in (collapse) points in both air and immersion tests. The double collapsing membranes enable an operating frequency ranging from 1.9 MHz in conventional mode to 58 MHz in second collapse mode on the same device. After flip-chip bonding the 2D arrays to custom-designed integrated circuits (IC), volumetric imaging was demonstrated.