Title :
An efficient retiming algorithm under setup and hold constraints
Author :
Lin, Chuan ; Zhou, Hai
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL
Abstract :
In this paper, we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous work (Papaefthymiou, 1998), which computed the minimum clock period in O(|V|3|E|lg|V|) time, our algorithm solves the same problem in O(|V|2|E|) time. Experimental results validate the efficiency of our algorithm
Keywords :
computational complexity; constraint handling; sequential circuits; shift registers; efficient retiming algorithm; hold constraints; sequential circuits; setup constraints; Algorithm design and analysis; Circuit testing; Clocks; Computer science; Delay; Electrical capacitance tomography; Logic testing; Polynomials; Registers; Sequential circuits; Algorithms; Design; Performance; Retiming;
Conference_Titel :
Design Automation Conference, 2006 43rd ACM/IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
1-59593-381-6
DOI :
10.1109/DAC.2006.229416
