Improvement of system reliability using SoC technique

The consideration of reliability as an “afterthought” in product development has proven to be “terribly expensive” and “ineffective procedure”. The right time to start considering reliability is the time when system and design concepts are being formulated. This leads a system designer to first choose an appropriate reliability assessment model to evaluate his system, followed by the prognosis of his design using the chosen model. Finally, identifying and controlling factors affecting reliability is the most important exercise for a designer. In the present work, the authors have proposed a system on chip design containing a multifunction protective relay on a Field Programmable Gate Array chip. An attempt is made to estimate the system reliability of the design. A reliability model is developed for the system. Two alternative designs for the same system differing in the number of `components´ on the chip, and external to it are compared in terms of reliability. The effect on overall reliability, when many components are integrated on a single chip, has been studied. The authors prove that their design not only reduces the cost of the system but also increases the reliability.