DocumentCode
2472438
Title
DFM: where´s the proof of value?
Author
Brandenburg, Joe ; Camposano, Raul ; Gianfagna, Mike ; Marchant, Linda ; Kahng, Andrew ; Zafar, Naeem ; Rawat, Shishpal ; Sawicki, Joe ; Sharan, Atul
fYear
0
fDate
0-0 0
Firstpage
1061
Lastpage
1062
Abstract
How can design teams employ new tools and develop response methodologies yet still stay within design budgets? How much effort does it require to be an early adopter and what kind of measurable results compensate for this effort? Panelists discuss how their design-for-manufacture (DFM) tools fit into a fixed design methodology, budget and timeline, and give examples of expected ROI (monetary, quality, reduced time-to-market, and comprehensive yield). The aim of this panel is to provide a serious comparison of related DFM technologies on the market and some idea of the cost and difficulty of integrating the tools into a fixed design budget and timeline. Specific results are cited, along with examples of expected ROI (monetary, quality, reduced time-to-market, and comprehensive yield enhancement). The audience should walk away with enough information to make an informed decision on which companies would make sense for their DFM challenges, to reach their own yield and throughput goals
Keywords
design for manufacture; integrated circuit yield; time to market; DFM technology; ROI; design-for-manufacture tools; fixed design methodology; Costs; Design for manufacture; Integrated circuit technology; Integrated circuit yield; Lithography; Manufacturing; Predictive models; Testing; Thermal stresses; Time to market; Algorithms; DFM; Design; Design for manufacture; Design for yield; OPC; RET; ROI; Yield optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2006 43rd ACM/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
1-59593-381-6
Type
conf
DOI
10.1109/DAC.2006.229437
Filename
1688956
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