Simulator Assisted CMOS Amplifier Design Using $Alpha$-Power Model

This paper demonstrates the design of analog amplifiers using alpha-power MOS model. Any MOS amplifier design begins with estimation of device parameters (NMOS/PMOS) like alpha(α), VT and device transconductance (k´) and they are typically estimated from simple device plots using simulator. The approach proposed here assumes V_T = V_GS measured at ID of 1 μA from the I/V plot. Once approximate VT is known, device transconductance (k´) is simply the drain current at V_OV of 1 V. For hand calculations, employing sub-micron devices, value of α is taken as 1.3 but it can be calculated from the g_m measurement again at overdrive (V_OV ) of 1 V, to reduce error due to α. This simple approach could be used to design the amplifier using pen and paper, and found to be much better than methods explained in text books using square-law model. It is also found that any error in V_T will be greatly reduced by k´ and α, and parameters can predict the device performance quite closely at lesser complexity. Proposed method is not only technology independent, it is simple to adapt for modern CMOS devices. Any basic SPICE like simulator may be used for extraction of parameters for typical device lengths used in analog design. Using proposed approach, an workable design can be made very quickly which can be optimized further using known procedures. Two basic amplifiers are designed using the proposed method and simulation results show the merit of the work.