Design considerations on low voltage synchronous power MOSFETs with monolithically integrated gate voltage pull-down circuitry

Author

Yang, Boyi ; Xu, Shuming ; Korec, Jacek ; Shen, John

Author_Institution

Lehigh Valley Bus. Unit, Texas Instrum. Inc., Bethlehem, PA, USA

fYear

2012

fDate

3-7 June 2012

Firstpage

121

Lastpage

124

Abstract

In this paper, a monolithically integrated gate voltage pull-down circuitry is presented to avoid the unintentional C·dV/dt induced turn-on. The concept of a low threshold voltage MOSFET with this integrated gate voltage pull-down circuitry is introduced as a contributing factor to the next generation high frequency DC-DC converter efficiency improvement. Design considerations on this new device and influences of critical design parameters on device/circuit performance will be fully discussed. In synchronous buck application, this integrated power module achieves more than 2% efficiency improvement over reference solution at high operation frequency (1MHz) under 19V input and 1.3V output condition.

Keywords

integrated circuit design; low-power electronics; modules; monolithic integrated circuits; power MOSFET; C·dV-dt induced turn-on; frequency 1 MHz; high frequency DC-DC converter efficiency; integrated power module; low threshold voltage synchronous power MOSFET; monolithically integrated gate voltage pull-down circuitry; synchronous buck application; voltage 1.3 V; voltage 19 V; Couplings; Logic gates; MOSFETs; Switches; Switching circuits; Threshold voltage; C·dV/dt induced turn-on; NexFET; Synchronous buck Converter; integrated gate voltage pull-down circuitry;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs (ISPSD), 2012 24th International Symposium on

Conference_Location

Bruges

ISSN

1943-653X

Print_ISBN

978-1-4577-1594-5

Electronic_ISBN

1943-653X

Type

conf

DOI

10.1109/ISPSD.2012.6229038

Filename

6229038