Title :
Scaling rule for very shallow trench IGBT toward CMOS process compatibility
Author :
Tanaka, Masahiro ; Omura, Ichiro
Author_Institution :
Kyushu Inst. of Technol., Kitakyushu, Japan
Abstract :
Deep trench gate is used for latest IGBT to improve device performance. By large difference from deep submicron CMOS structure, there is no process compatibility among CMOS device and trench gate IGBT. We propose IGBT scaling rule for shrinking IGBT cell structure both horizontally and vertically. The scaling rule is theoretically delivered by structure based equations. Device performance improvement was also predicted by TCAD simulations even with very shallow trench gate. The rule enables to produce trench gate IGBT on large diameter wafer in CMOS factory with superior productivity.
Keywords :
CMOS integrated circuits; insulated gate bipolar transistors; CMOS device; CMOS factory; CMOS process compatibility; IGBT scaling rule; TCAD simulations; shallow trench gate IGBT; shrinking IGBT cell structure; structure based equations; CMOS integrated circuits; Electric fields; Insulated gate bipolar transistors; Logic gates; Mathematical model; Performance evaluation; Power semiconductor devices; 300–450mm wafer; CMOS process; Shallow trench;
Conference_Titel :
Power Semiconductor Devices and ICs (ISPSD), 2012 24th International Symposium on
Conference_Location :
Bruges
Print_ISBN :
978-1-4577-1594-5
Electronic_ISBN :
1943-653X
DOI :
10.1109/ISPSD.2012.6229052
