DocumentCode
2473765
Title
Novel lateral 700V DMOS for integration: Ultra-low 85 mΩ ·cm2 on-resistance, 750V LFCC
Author
Kim, Sunglyong ; Kim, Jongjib ; Prosack, Hank
Author_Institution
ATG, Process Technol. Dev., Fairchild Semicond., South Portland, ME, USA
fYear
2012
fDate
3-7 June 2012
Firstpage
185
Lastpage
188
Abstract
A new device concept which is able to break through the silicon limit has been introduced. LFCC (Lateral Floating-Capacitor-Coupled) structure with lateral trench array along drift layer makes drift dose higher than normal RESURF structure with high breakdown voltage. Three dimensional capacitive coupling helps electric field over drift region obtain trapezoidal shape which results in high breakdown voltage with relatively short drift length. Experimental results showed 85 mΩ·cm2 of specific Ron with 750V of breakdown voltage.
Keywords
MOS integrated circuits; capacitors; DMOS; LFCC structure; RESURF structure; drift layer; lateral floating-capacitor-coupled structure; lateral trench array; silicon limit; voltage 700 V; voltage 750 V; Electric fields; Electrodes; Junctions; Leakage current; Logic gates; Silicon; Stress; Breakdown Voltage; Capacitively Coupled; LDMOS; LFCC; On resistance; RESURF; Stress; Trench;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs (ISPSD), 2012 24th International Symposium on
Conference_Location
Bruges
ISSN
1943-653X
Print_ISBN
978-1-4577-1594-5
Electronic_ISBN
1943-653X
Type
conf
DOI
10.1109/ISPSD.2012.6229054
Filename
6229054
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