The extraction and measurement of on-die impedance for power delivery analysis

Power delivery system noise, current and impedance are the key performance factors for successful chipsets/CPUs design. Power delivery noise is significantly affected by on-die impedance and current, i.e., on-die power grid equivalent resistance (Rdie), capacitance (Cdie), and Icc(t). Rdie and Cdie have been challenging in pre-silicon extraction and post-silicon measurement. This paper focuses on Rdie and Cdie extraction and silicon correlation. We carried out Rdie and Cdie extraction comparison study for Intel products that contain several PHY blocks by using home-brew flow, a commercial tool, and lab measurement, to achieve good correlation. The work boosts our confidence in the accuracies of internal flow and commercial tool and therefore facilitates the adoption of the commercial tool to greatly improve die grid modeling effort.