Title :
Using partial masking in X-chains to increase output compaction for an X-canceling MISR
Author :
Bawa, Asad A. ; Rab, M. Tauseef ; Touba, Nur A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas, Austin, TX, USA
Abstract :
An X-Canceling MISR [Touba 07] provides the ability to tolerate unknowns (X\´s) in the output response with very little loss of observability of non-X values. When the density of X\´s is low, an X-Canceling MISR is extremely efficient as the number of control bits depends only on the total number of X\´s in the output response. However, for higher X-densities, an X-Canceling MISR becomes less efficient. This paper describes a very effective approach for using an X-Canceling MISR for designs with high X-density. It utilizes the idea of stitching together scan cells that capture the largest number of X\´s into "X-chains" as was proposed in [Wohl 08]: In the proposed approach, a partial X-masking approach is used for the X-chains to eliminate the vast majority of the X\´s at very little cost in terms of control bits. Only the X\´s coming from the scan cells not in the X-chains plus X\´s that are left unmasked in the X-chains need to be handled by the X-canceling MISR thereby significantly reducing the total number of control bits required. Experimental results show an order of magnitude improvement in the output compaction can be achieved.
Keywords :
circuit testing; design for testability; DFT; X-canceling MISR; X-chains; X-density; circuit-under-test; control bits; design-for- testability; partial masking; scan cells; Discrete Fourier transforms; Fault tolerance; Fault tolerant systems; Nanotechnology; Very large scale integration; X-chains; output compression; output masking;
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-3043-5
DOI :
10.1109/DFT.2012.6378193