Title :
On the development of Software-Based Self-Test methods for VLIW processors
Author :
Sabena, D. ; Reorda, M. Sonza ; Sterpone, L.
Author_Institution :
Dipt. di Autom. e Inf., Politec. di Tonno, Turin, Italy
Abstract :
Software-Based Self-Test (SBST) approaches are an effective solution for detecting permanent faults; this technique has been widely used with a good success on generic processors and processors-based architectures; however, when VLIW processors are addressed, traditional SBST techniques and algorithms must be adapted to each particular VLIW architecture. In this paper, we present a method that formalizes the development flow to write effective SBST programs for VLIW processors, starting from known algorithms addressing traditional processors. In particular, the method addresses the parallel Functional Units, such as ALUs and MULs, embedded into a VLIW processor. Fault simulation campaigns confirm the validity of the proposed method.
Keywords :
automatic test software; fault diagnosis; instruction sets; integrated circuit testing; microprocessor chips; parallel architectures; ALU; SBST approach; VLIW architecture; VLIW processors; fault simulation; parallel functional units; permanent fault detection; processor-based architectures; software-based self-test methods; very long instruction word processors; Decision support systems; Discrete Fourier transforms; Fault tolerance; Fault tolerant systems; Nanotechnology; Very large scale integration; Fault Simulation; SBST; VLIW;
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-3043-5
DOI :
10.1109/DFT.2012.6378194
