Planar dual gate oxide LDMOS structures in 180nm power management technology

This paper presents a 20V-rated planar dual gate oxide NLDMOS power device structure fabricated in a 180nm power management technology. The performance of the planar dual gate device structure is compared to a conventional STI-based device and it is shown that the planar dual gate structure has superior BV_ds-R_sp, g_m, HCI reliability, and forward safe operating area figures-of-merit. The planar dual gate structure exhibits BV_ds=32V/14 mΩ.mm² specific on-resistance (and BV_ds=20V/7.5mΩ.mm² for a drift length scaled version), hot carrier reliability in excess of 10 years analog lifetime in all bias regimes, and a linear forward IV characteristic. The planar dual gate architecture is scalable in rated voltage from 7V to 24V, and is an ideal component for the integration of USB switch, battery charging, backlighting, and PA envelope tracking mobile applications.