DocumentCode :
2475009
Title :
Overview of the evolution of PLL synthesizers used in mobile terminals
Author :
Itoh, Kenji ; Uesugi, Mikio ; Murakami, Shinsuke ; Joba, Hiroyuki
Author_Institution :
Mobile Terminal Center, Mitsubishi Electr. Corp., Hyogo, Japan
fYear :
2004
fDate :
19-22 Sept. 2004
Firstpage :
471
Lastpage :
474
Abstract :
This work describes an overview of the evolution of PLL synthesizers used in mobile terminals. At first, a limitation of switching speed is demonstrated for clarification of motivation to employ the fractional PLL. Secondly, the driving force behind the evolution of PLL is demonstrated with system requirements and technical roadmap for the chipsets and PLL synthesizers. Finally, SiGe RF-IC for PDC and W-CDMA with PLL functionalities are demonstrated in this paper.
Keywords :
3G mobile communication; Ge-Si alloys; mobile handsets; phase locked loops; radiofrequency integrated circuits; PDC; PLL synthesizers; Si-Ge; SiGe RF-IC; W-CDMA; chipsets; fractional PLL; mobile terminals; switching speed; Delay; Frequency conversion; Frequency synthesizers; Integrated circuit synthesis; Multiaccess communication; Phase detection; Phase frequency detector; Phase locked loops; Phase noise; Transceivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio and Wireless Conference, 2004 IEEE
Print_ISBN :
0-7803-8451-2
Type :
conf
DOI :
10.1109/RAWCON.2004.1389179
Filename :
1389179
Link To Document :
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