A 40 Gb/s integrated differential PIN+TIA with DC offset control using InP SHBT technology

Author

Caruth, D. ; Shen, S.C. ; Chan, D. ; Feng, M. ; Schutt-Aine, J.

Author_Institution

Xindium Technol. Inc., Champaign, IL, USA

fYear

2002

fDate

20-23 Oct. 2002

Firstpage

59

Lastpage

62

Abstract

Describes the design and measured performance of a 40 Gb/s integrated differential PIN+TIA with offset control using InP SHBT technology. The circuit was designed to handle large average optical input power levels (>5 dBm) encountered in short-haul networks where optical gain control may not be available or economical.

Keywords

III-V semiconductors; bipolar analogue integrated circuits; differential amplifiers; heterojunction bipolar transistors; indium compounds; integrated optoelectronics; optical fibre networks; optical receivers; p-i-n photodiodes; 40 Gbit/s; DC offset control; InP; SHBT technology; fully differential preamplifier; integrated differential PIN+TIA; optical input power; photoreceiver; short-haul networks; transimpedance amplifier; Bonding; Feedback loop; Heterojunction bipolar transistors; Indium phosphide; Integrated circuit technology; Operational amplifiers; Optical receivers; Photodiodes; Probes; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2002. 24th Annual Technical Digest

Conference_Location

Monterey, California, USA

ISSN

1064-7775

Print_ISBN

0-7803-7447-9

Type

conf

DOI

10.1109/GAAS.2002.1049029

Filename

1049029