Title :
P2B-8 Design of a Digital High Frequency Linear Array Ultrasound Imaging System with High Frame Rate
Author :
Hu, Chang-Hong ; Shung, K. Kirk ; Chang, Allan
Author_Institution :
Univ. of Southern California, Los Angeles
Abstract :
In order to improve the lateral resolution and extend the image view of the previously developed 16-channel digital beamformer for a 30 MHz ultrasound linear array, the design of an ultrasound imaging system with a higher frame rate and increased channel count is reported in this paper. The system is composed of 256 channels of analog front-end pulser/receiver, 64 channels of Time-Gain Compensation (TGC), 64 channels of high-speed digitizer as well as a beamformer. A PC is used as user interface to display the real time images. This system is designed to handle a 256 elements linear array or a 64 elements phased array transducer. The system provides 64 channels of excitation pulsers while receiving simultaneously at a 20-500 MHz sampling rate with 12-bit resolution. The digitized data of all channels are first fed through FPGAs, and then stored in memories. Those raw data are accessed by the beamforming processor to re-build the image or download to the PC for further processing. The beamformer that applies delays to the echoes of each channel is implemented with the strategy that combines coarse and fine delays. The coarse delays are integer multiple the sampling clock rate. They are achieved by controlling write enable pin of First-In-First-Out memory to obtain valid beamforming data. The fine delays are accomplished with precision clock control that is able to adjust the sampling clock delay down to 160 ps. A Pulsed-wave Doppler Processor is also implemented to detect the Doppler shift and calculate the Doppler spectrum to form a duplex scanner. Such a structure allows a maximum frame rate of 100 frames per second to be achieved.
Keywords :
field programmable gate arrays; ultrasonic imaging; ultrasonic transducer arrays; 16-channel digital beamformer; Doppler shift; Doppler spectrum; FPGA; channel count; digital high frequency ultrasound linear array; first-in-first-out memory; frequency 30 MHz; high-speed digitizer; phased array transducer; precision clock control; pulsed-wave Doppler processor; sampling clock delay; time-gain compensation; ultrasound imaging system; Array signal processing; Clocks; Delay; Frequency; High-resolution imaging; Image resolution; Image sampling; Phased arrays; Ultrasonic imaging; User interfaces;
Conference_Titel :
Ultrasonics Symposium, 2007. IEEE
Conference_Location :
New York, NY
Print_ISBN :
978-1-4244-1384-3
Electronic_ISBN :
1051-0117
DOI :
10.1109/ULTSYM.2007.385