Title :
InP DHBT technology and design for 40 Gbit/s full-rate-clock communication circuits
Author :
Godin, J. ; Riet, M. ; Blayac, S. ; Berdaguer, P. ; Dhalluin, V. ; Alexandre, F. ; Kahn, M. ; Pinquier, A. ; Kasbari, A. ; Moulu, J. ; Konczykowska, A.
Author_Institution :
ALCATEL R&I /OPTO, Marcoussis, France
Abstract :
In this paper, we present our InP DHBT technology with improved performances, yield and uniformity; and some new design tools, both of which have allowed us to achieve 40+ Gbit/s full-rate-clock circuits, such as the D-flip-flop. These circuits have been characterized and packaged.
Keywords :
III-V semiconductors; bipolar integrated circuits; circuit CAD; clocks; flip-flops; heterojunction bipolar transistors; indium compounds; integrated circuit measurement; integrated circuit packaging; optical communication equipment; optical fibre networks; software tools; 40 Gbit/s; D-flip-flop; DHBT yield; DWDM; InP; InP DHBT IC design; InP DHBT technology; circuit characterization; design tools; full-rate-clock communication circuits; optical networks; packaged circuits; Circuits; Clocks; Current measurement; DH-HEMTs; Density measurement; Design methodology; Electronics packaging; Fabrication; Indium phosphide; Wavelength division multiplexing;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2002. 24th Annual Technical Digest
Conference_Location :
Monterey, California, USA
Print_ISBN :
0-7803-7447-9
DOI :
10.1109/GAAS.2002.1049063
