Title :
Bias dependence of 0.25 /spl mu/m pHEMT parasitic elements as determined with a direct extraction method
Author_Institution :
TriQuint Semicond., Richardson, TX, USA
Abstract :
There are numerous occurrences of published FET modeling procedures that make use of the assumption that some or all of the parasitic element values have negligible bias dependence. A direct extraction method for FET parasitic elements was recently introduced by C.F. Campbell and S.A. Brown (IEEE Trans. Microwave Theory Tech., vol. 49, no 7, pp. 1241-1247, 2001). Given a value for R/sub g/, the remaining parasitic elements, R/sub s/, R/sub d/, L/sub g/, L/sub s/, and L/sub d/ are analytically extracted from device S-parameter data for a single active bias condition. Since the method requires no optimization, each FET model is extracted in a consistent and repeatable manner making it a good candidate for studying the bias dependence of the equivalent circuit elements. The technique utilizes the small signal FET model suggested by Curtice where the drain current source is controlled by the voltage across the series combination of C/sub gs/ and R/sub i/ (W. Curtice and R. Camisa, ibid., vol. 32, pp. 1573-1578, 1984). A more common configuration is to use the voltage across C/sub gs/ only to control the drain current source and a modification to the algorithm is required. In this paper, the direct extraction method presented by Campbell and Brown is reviewed and modified for the drain current controlling voltage across C/sub gs/ only. The technique is then applied to investigate the bias dependence of the parasitic elements for a 0.25 /spl mu/m pHEMT device.
Keywords :
S-parameters; equivalent circuits; high electron mobility transistors; semiconductor device models; 0.25 micron; FET model; FET modeling procedures; FET parasitic elements; bias dependence; device S-parameter data; direct extraction method; drain current controlling voltage; drain current source; equivalent circuit elements; pHEMT parasitic elements; parasitic element values; single active bias condition; small signal FET model; Data mining; Equations; Equivalent circuits; FETs; Frequency; Linear regression; Optimization methods; PHEMTs; Scattering parameters; Voltage control;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2002. 24th Annual Technical Digest
Conference_Location :
Monterey, California, USA
Print_ISBN :
0-7803-7447-9
DOI :
10.1109/GAAS.2002.1049068