Title :
Accurately modelling of parasitics in power electronics circuits using an easy RLC-extraction method
Author :
Jacqmaer, Pieter ; Zwysen, Jeroen ; Gelagaev, Ratmir ; Driesen, Johan
Author_Institution :
Dept. of Electr. Eng., Katholieke Univ. Leuven, Leuven, Belgium
Abstract :
A method for accurately modelling parasitics in power electronic circuits, is presented in this paper. The freeware software programs FastCap and FastHenry are used to create a model of the printed circuit board tracks, consisting of resistances, self and mutual inductances, and self and mutual capacitances. This model can be easily loaded into a standard circuit simulator such as Spice, together with models for other components, such as the diodes, transistors, coils and capacitances. Thus, the power electronic circuit can easily be simulated in the time domain, returning electrical currents and voltages typically being subject to ringing effects and overshoot.
Keywords :
RLC circuits; power convertors; power engineering computing; printed circuits; time-domain analysis; FastCap freeware software program; FastHenry freeware software program; RLC-extraction method; Spice; coils; diodes; electrical resistance; mutual capacitance; mutual inductance; parasitic modelling; power converters; power electronic circuits; printed circuit board tracks; ringing effect; self-capacitance; self-inductance; standard circuit simulator; time domain; transistors; Capacitance; Conductors; Current measurement; Integrated circuit modeling; Power electronics; Substrates; Voltage measurement;
Conference_Titel :
Instrumentation and Measurement Technology Conference (I2MTC), 2012 IEEE International
Conference_Location :
Graz
Print_ISBN :
978-1-4577-1773-4
DOI :
10.1109/I2MTC.2012.6229327