Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures

Author

Dutt, S. ; Hayes, J.P.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

fYear

1988

fDate

27-30 June 1988

Firstpage

328

Lastpage

333

Abstract

A graph G(k,T) representing a multiprocessor architecture is a k-fault-tolerant (k-FT) implementation of a basic tree T, if G(k,T) contains T after removal of any k nodes. The authors consider the design of such k-FT architectures with the primary goals of minimizing the number of spare nodes and edges. The authors present a systematic methodology for designing k-FT implementations of nonhomogeneous symmetric d-ary trees based on graph covering. The resulting designs are optimal in a well-defined sense when k>

Keywords

fault tolerant computing; graph theory; multiprocessor interconnection networks; parallel architectures; trees (mathematics); fault-free tree; graph covering; k-FT homogeneous symmetric trees; multiprocessor architecture; near-optimal k-fault-tolerant tree architectures; nonhomogeneous symmetric d-ary trees; reconfiguration strategies; Binary trees; Computer architecture; Contracts; Degradation; Design methodology; Fault tolerance; Laboratories; Tree data structures; Tree graphs;

fLanguage

English

Publisher

ieee

Conference_Titel

Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on

Conference_Location

Tokyo, Japan

Print_ISBN

0-8186-0867-6

Type

conf

DOI

10.1109/FTCS.1988.5339

Filename

5339