Temperature tracking current reference for multilevel phase-change memories

Author

Gallazzi, F. ; Cabrini, A. ; Torelli, G.

Author_Institution

Dept. of Electron., Univ. of Pavia, Pavia, Italy

fYear

2011

fDate

3-7 July 2011

Firstpage

213

Lastpage

216

Abstract

In this paper, a temperature tracking current reference for read and verify operations in multilevel phase-change memories is proposed. The circuit is able to track the temperature behavior of the PCM cell current of all programmed states over a temperature range from -20°C to 80°C. The proposed solution is based on an MOS transistor biased near its zero temperature coefficient point. Only room temperature trimming is required to adjust the value and the temperature behavior of the generated current. Simulated results show a good agreement with experimental data on PCM cells: the error is kept within 5% in any process condition.

Keywords

MOSFET; phase change memories; MOS transistor; PCM cell current; multilevel phase-change memories; room temperature trimming; temperature -20 degC to 80 degC; temperature 293 K to 298 K; temperature tracking current reference; zero temperature coefficient point; Logic gates; Phase change materials; Temperature dependence; Temperature distribution; Temperature measurement; Temperature sensors;

fLanguage

English

Publisher

ieee

Conference_Titel

Ph.D. Research in Microelectronics and Electronics (PRIME), 2011 7th Conference on

Conference_Location

Trento

Print_ISBN

978-1-4244-9138-4

Electronic_ISBN

978-1-4244-9136-0

Type

conf

DOI

10.1109/PRIME.2011.5966255

Filename

5966255