Optoelectronic implementation of the Register Insertion Bus high-speed network

Author

Maniatis, D.P. ; Mitkas, P.A. ; Irakliotis, L.J. ; Jayasumana, A.P.

Author_Institution

Dept. of Electr. Eng., Colorado State Univ., Fort Collins, CO, USA

fYear

1993

fDate

15-18 Nov 1993

Firstpage

394

Lastpage

395

Abstract

The Register Insertion Bus (RIB) is a scalable optical network using a folded-bus topology. The access scheme relies on two buffers found in each station to hold packets that would conflict. An active fiber optic tap has been utilized for the switching of the packets that may conflict. In this paper we present an optoelectronic implementation using, instead of the two buffers, a fiber optic delay line memory loop. Passive taps are used for the control of the bus and the fiber loop. LiNbO₃ electrooptic switches are also used as active switching elements

Keywords

electro-optical switches; high-speed optical techniques; optical delay lines; optical fibre networks; system buses; LiNbO₃; LiNbO₃ electrooptic switches; Register Insertion Bus; access scheme; active taps; fiber optic delay line memory loop; folded-bus topology; high-speed network; optical network; optoelectronic technology; passive taps; Clocks; Delay lines; High-speed networks; Logic; Network topology; Optical fibers; Optical packet switching; Optical pulses; Optical switches; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Lasers and Electro-Optics Society Annual Meeting, 1993. LEOS '93 Conference Proceedings. IEEE

Conference_Location

San Jose, CA

Print_ISBN

0-7803-1263-5

Type

conf

DOI

10.1109/LEOS.1993.379224

Filename

379224