Title :
A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications
Author :
Yijin Zhao ; Jinjia Zhou ; Dajiang Zhou ; Goto, Satoshi
Author_Institution :
Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan
Abstract :
This paper presents a high-throughput decoder of HEVC context-based adaptive binary arithmetic coding (CABAC). A multi-sub-engine arithmetic decoder (MSE-AD) design is proposed to increase the average number of bins delivered per clock cycle by adaptively processing different patterns of upcoming bins with balanced critical path delay. A syntax element (SE) grouping scheme is proposed to maximize the utilization of MSE-AD under the SE parsing order specified in the standard. We also employ a prediction-based pipeline to alleviate the data hazard problem. The proposed CABAC decoder delivers 2.36 bins per clock cycle and achieves a maximum clock frequency of 258MHz in 90nm technology. The resulting performance is 610 Mbin/s which is enough for H.265/HEVC level 6.1 (8K×4K@60fps) applications.
Keywords :
adaptive codes; arithmetic codes; binary codes; data compression; decoding; video coding; CABAC decoder; H.265/HEVC level 6.1; MSE-AD design; SE parsing order; balanced critical path delay; context-based adaptive binary arithmetic coding; data hazard problem; high-throughput decoder; multisub-engine arithmetic decoder design; prediction-based pipeline; size 90 nm; syntax element grouping scheme; Clocks; Context; Decoding; Engines; Pipeline processing; Syntactics; Video coding; CABAC; H.265/HEVC; entropy coding; level 6.1;
Conference_Titel :
Image Processing (ICIP), 2014 IEEE International Conference on
Conference_Location :
Paris
DOI :
10.1109/ICIP.2014.7025253