Title :
Stabilization of Linear Systems by Bit-Memory Controllers under Constraints of Bit-Length
Author_Institution :
Dept. of Inf. Phys. & Comput., Tokyo Univ.
Abstract :
In this paper, we deal with stabilization problem of discrete time linear systems by bit-memory controllers under constraints of bit-length. The bit-memory is a unified notion for the complexity of controllers and the information limitation such as data rate constraints. We formulate a stabilization problem and give its controllers by two approaches. The first one is with an approximation of the ordinary stabilizing controllers for the plants by the dynamical systems which have quantized state variables of limited bit-length. This approximated bit-memory controller strictly follows the output of the original controller within a given error bound. The second one is an observer based bit-memory controller which gives the state estimation following the original state also within an error bound. We give the upper bounds of the bit-length of the controllers which satisfy a practical stability of the closed loop systems. Finally we analyze the relationship between the complexity of the controllers, the characteristics of the plants such as pole, and control performance and discuss their application for the networked control
Keywords :
closed loop systems; computational complexity; discrete time systems; distributed control; linear systems; poles and zeros; stability; state estimation; bit-length constraint; bit-memory controllers; closed loop system; controller complexity; discrete time linear systems; dynamical systems; linear system stabilization; networked control; state estimation; Analog computers; Computer networks; Control systems; Control theory; Error correction; Information theory; Linear systems; Networked control systems; State estimation; Upper bound;
Conference_Titel :
Decision and Control, 2006 45th IEEE Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
1-4244-0171-2
DOI :
10.1109/CDC.2006.376855