DocumentCode :
2484958
Title :
A low computing power frame rate converter
Author :
Chen, Yu-Chieh ; Liao, Tai-Shan ; Chen, Hsin
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing-Hua Univ., Hsinchu, Taiwan
fYear :
2012
fDate :
13-16 May 2012
Firstpage :
1000
Lastpage :
1003
Abstract :
A method of converting an unmatched image frame rate converter is presented. This low processing power method solves the problem of an unmatched frame rate between the image source and the instrument display apparatus, especially in a power limited condition. We used a Field Programmable Gate Array (FPGA) device as the design platform because of its flexibility and can be further transferred into Application specific integrated circuit (ASIC) to reduce the overall power consumption. The proposed design uses no power hungry arithmetic processing unit, such as multiplexer. Therefore, it is suitable for low-power design, such as portable devices and hand-held instrument monitors.
Keywords :
application specific integrated circuits; display instrumentation; field programmable gate arrays; image processing; image processing equipment; ASIC; application specific integrated circuit; arithmetic processing unit; field programmable gate array device; hand held instrument monitor; image source; instrument display apparatu; low computing power frame rate converter; low power design; low processing power method; unmatched frame rate; unmatched image frame rate converter; Field programmable gate arrays; Image color analysis; Instruments; Monitoring; SDRAM; Sensors; Synchronization; Bayer color pattern; FPGA; Frame rate; low-power design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Instrumentation and Measurement Technology Conference (I2MTC), 2012 IEEE International
Conference_Location :
Graz
ISSN :
1091-5281
Print_ISBN :
978-1-4577-1773-4
Type :
conf
DOI :
10.1109/I2MTC.2012.6229638
Filename :
6229638
Link To Document :
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